1. Field of the Invention
The present invention relates to a semiconductor device having a plural semiconductor elements.
2. Description of the Related Art
Semiconductor devices, in which plural semiconductor elements are stacked and sealed in a single package, have been used in purpose of downsizing and high-density packaging of semiconductor devices. In view of reducing cost of the semiconductor devices (semiconductor packages), inexpensive lead frames are used as circuit substrates to mount semiconductor elements. In such semiconductor device (TSOP, etc.) using the lead frame, the semiconductor elements are sequentially mounted on an element support of the lead frame. Electrode pads of the semiconductor elements are electrically connected to leads of the lead frame via metal wires (bonding wires).
When the semiconductor elements are mounted on one surface of the lead frame, the lead frame, which is depressed to form its element support lower than the leads, is employed in order to increase the number of mountable semiconductor elements. Such a depression process causes an increased lead frame manufacturing cost, and further, an increased semiconductor device manufacturing cost. Since the depressed lead frame has an inclined portion, the size of mountable semiconductor elements is limited.
It has been considered to stack plural semiconductor elements on both surfaces of a lead frame (JP-A 2007-035865 (KOKAI)). In this case, a resin molding is performed in a state that the semiconductor elements are mounted on the both surfaces of the lead frame so that the filling performance of the sealing resin is reduced because of its pad arrangement on the semiconductor element and lead frame shape due to the pat arrangement. In view of this point, it is preferable that semiconductor elements are stacked and mounted only one surface of the lead frame. However, according to the conventional semiconductor device having a single-side stacked structure, there have been problems such as an increased manufacturing cost due to the depression process, and element size limitations.
In semiconductor devices (BGA, etc.) in which semiconductor elements are mounted on a wiring board, plural semiconductor elements are stacked to be mounted. When a wire bonding is executed in a stacked semiconductor elements, the semiconductor elements are preferably stacked in a stepped manner to expose electrode pads of the respective elements. In this case, the area of the wiring board occupied by the semiconductor elements increases as the number of the semiconductor elements increases. Thus, the size of the semiconductor elements mountable to the wiring board is needed to be limited.